CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 1 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 igbt sip module (fast igbt) features ? fully isolated printed circuit board mount package ? switching-loss rating includes all tail losses ?hexfred ? soft ultrafast diodes ? optimized for medium speed, see fig. 1 for current vs. frequency curve ? designed and qualified for industrial level ? ul approved file e78996 ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 description the igbt technology is the key to the advanced line of ims (insulated metal substrate) po wer modules. these modules are more efficient than co mparable bipolar transistor modules, while at the same time having the simpler gate-drive requirements of th e familiar power mosfet. this superior technology has now been coupled to a state of the art materials system that maxi mizes power throughput with low thermal resistance. this package is highly suited to motor drive applications and where space is at a premium. ? product summary output current in a typical 5.0 khz motor drive v ces 600 v i rms per phase (3.1 kw total) with t c = 90 c 11 a t j 125 c supply voltage 360 v dc power factor 0.8 modulation depth see fig. 1 115 % v ce(on) (typical) at i c = 4.8 a, 25 c 1.41 v speed 1 khz to 8 khz package sip circuit three phase inverter ims-2 absolute maximum ratings parameter symbol test conditions max. units collector to em itter voltage v ces 600 v continuous collector current, each igbt i c t c = 25 c 8.8 a t c = 100 c 4.8 pulsed collector current i cm repetitive rating; v ge = 20 v, ? pulse width limi ted by maximum ? junction temperat ure. see fig. 20 26 clamped inductive load current i lm v cc = 80 % (v ces ), v ge = 20 v, ? l = 10 h, r g = 50 ? see fig. 19 800 diode continuous forward current i f t c = 100 c 3.4 diode maximum forward current i fm 26 gate to emi tter voltage v ge 20 v isolation voltage v isol any terminal to case, t = 1 min 2500 v rms maximum power dissipation, each igbt p d t c = 25 c 23 w t c = 100 c 9.1 operating junction and ? storage temperature range t j , t stg -40 to +150 c soldering temperature for 10 s 300 (0.063" (1.6 mm) from case) mounting torque 6-32 or m3 screw 5 to 7 (0.55 to 0.8) lbf in (n m) thermal and mechanical specifications parameter symbol typ. max. units junction to case, each igbt , one igbt in conduction r thjc (igbt) - 5.5 c/w junction to case, each diode, one diode in conduction r thjc (diode) - 9.0 case to sink, flat , greased surface r thcs (module) 0.1 - weight of module 20 (0.7) - g (oz.)
CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 2 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 electrical specifications (t j = 25 c unless otherwise specified) parameter symbol test conditio ns min. typ. max. units collector to emitte r breakdown voltage v (br)ces v ge = 0 v, i c = 250 a ? pulse width ? 80 s, duty factor ? 0.1 % 600 - - v temperature coeff. of breakdown voltage ? v (br)ces ?? t j v ge = 0 v, i c = 1.0 ma - 0.72 - v/c collector to emitter saturation voltage v ce(on) i c = 4.8 a v ge = 15 v see fig. 2, 5 - 1.41 1.7 v i c = 8.8 a - 1.66 - i c = 4.8 a, t j = 150 c - 1.42 - gate threshold voltage v ge(th) v ce = v ge , i c = 250 a 3.0 - 6.0 gate to emitter leakage current i ges v ge = 20 v - - 100 na temperature coeff. of threshold voltage ? v ge(th) / ? t j v ge = 0 v, i c = 1.0 ma - -11 - mv/c forward transconductance g fe v ce = 100 v, i c = 4.8 a ? pulse width 5.0 s; single shot 2.9 5.0 - s zero gate voltage collector current i ces v ge = 0 v, v ce = 600 v - - 250 a v ge = 0 v, v ce = 600 v, t j = 150 c - - 1700 diode forward voltage drop v fm i c = 8.0 a i c = 8.0 a, t j = 150 c see fig. 13 -1.41.7 v -1.31.6 switching characteristics (t j = 25 c unless otherwise specified) parameter symbol test conditio ns min. typ. max. units total gate charge (turn on) q g i c = 4.8 a v cc = 400 v ? see fig. 8 -3045 nc gate to emitter charge (turn on) q ge -4.06.0 gate to coll ector charge q gc -1320 turn-on delay time t d(on) t j = 25 c ? i c = 4.8 a, v cc = 480 v ? v ge = 15 v, r g = 50 ??? energy losses include tail and ? diode reversev recovery. ? see fig. 9, 10, 18 -49- ns rise time t r -22- turn-off delay time t d(off) - 200 300 fall time t f - 214 320 turn-on switching loss e on -0.23- mj turn-off switching loss e off -0.33- total switching loss e ts - 0.45 0.70 turn-on delay time t d(on) t j = 150 c, ? i c = 4.8 a, v cc = 480 v ? v ge = 15 v, r g = 50 ??? energy losses include tail and ? diode reverse recovery ? see fig. 10, 11, 18 -48- ns rise time t r -25- turn-off delay time t d(off) - 435 - fall time t f - 364 - total switching loss e ts -0.93- mj input capacitance c ies v ge = 0 v ? v cc = 30 v see fig. 7 - 340 - pf output capacitance c oes -63- reverse transfer capacitance c res -5.9- diode reverse recovery time t rr t j = 25 c see fig. 14 i f = 8.0 a ? v r = 200 v ? di/dt = 200 a/s -3755 ns t j = 125 c - 55 90 diode peak reverse recovery current i rr t j = 25 c see fig. 15 -3.550 a t j = 125 c - 4.5 8.0 diode reverse recovery charge q rr t j = 25 c see fig. 16 - 65 138 nc t j = 125 c - 124 360 diode peak rate of fall of recovery during t b di (rec)m /dt t j = 25 c see fig. 17 - 240 - a/s t j = 125 c - 210 -
CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 3 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 1 - typical load current vs. frequency (load current = i rms of fundamental) fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - maximum collector current vs. case temperature fig. 5 - typical collecto r to emitter voltage vs. junction temperature 0 4 3 2 1 5 6 7 8 9 0.1 1 f - frequency (khz) load current (a) 100 0.00 0.29 0.58 0.88 1.17 1.46 1.75 2.05 2.34 2.63 10 t c = 90 c t j = 125 c power factor = 0.8 modulation depth = 1.15 v cc = 50 % of rated voltage total output power (kw) 1 100 10 i c - collector to ermitter current (a) v ce - collector to emitter voltage (v) 10 1 v ge = 15 v 20 s pulse width t j = 25 c t j = 150 c 1 100 10 i c - collector to emitter current (a) v ge - gate to emitter voltage (v) 6 7 8 9 10 11 12 13 14 5 v cc = 50 v 5 s pulse width t j = 25 c t j = 150 c 0 2 4 6 8 10 maximum dc collector current (a) t c - case temperature (c) 25 50 75 100 125 150 1.0 2.0 1.5 2.5 v ce - collector to emitter voltage (v) t j - junction temperature (c) - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 v ge = 15 v 80 s pulse width i c = 9.6 a i c = 4.8 a i c = 2.4 a
CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 4 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 6 - maximum effective transient thermal impedance, junction to case fig. 7 - typical capacitance vs. collector to em itter voltage fig. 8 - typical gate charge vs. gate to emitter voltage fig. 9 - typical switching losses vs. gate resistance fig. 10 - typical switching losses vs. junction temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 t 1 - rectangular pulse duration (s) z thjc - thermal impedance 10 d = 0.50 d = 0.20 d = 0.10 d = 0.05 d = 0.02 d = 0.01 single pulse (thermal response) p dm t 1 t 2 notes: 1. duty factor d = t 1 /t 2 2. peak t j = p dm x z thjc + t c 0 800 1000 600 400 200 c - capacitance (pf) v ce - collector to emitter voltage (v) 10 100 1 v ge = 0 v, f = 1 mhz c ies = c ge + c ce shorted c res = c gc c oes = c ce + c gc c ies c oes c res 0 12 16 4 8 20 v ge - gate to emitter voltage (v) q g - total gate charge (nc) 6121824 30 0 v cc = 400 v i c = 4.8 a 0.42 0.43 0.44 0.45 0.46 total switching losses (mj) r g - gate resistance ( ) 20 30 40 50 10 v cc = 480 v v ge = 15 v t j = 25 c i c = 4.8 a 0.1 1 10 total switching losses (mj) t j - junction temperature (c) - 40 - 20 0 60 40 20 80 100 120 140 160 - 60 r g = 50 v ge = 15 v v cc = 480 v i c = 9.6 a i c = 4.8 a i c = 2.4 a
CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 5 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 11 - typical switching losses vs. collector to emitter current fig. 12 - turn-off soa fig. 13 - maximum forward voltage drop vs. instantaneous forward current fig. 14 - typical revers e recovery time vs. di f /dt fig. 15 - typical recovery current vs. di f /dt fig. 16 - typical stored charge vs. di f /dt 0.0 0.5 1.0 1.5 2.0 total switching losses (mj) i c - collector to emitter current (a) 246810 0 r g = 50 t j = 150 c v cc = 480 v v ge = 15 v 1 100 10 i c - collector to emitter current (a) v ce - collector to emitter voltage (v) 10 100 1000 1 safe operating area v ge = 20 v t j = 125 c 0.1 1 100 10 i f - instantaneous forward current (a) v fm - forward voltage drop 0.4 2.0 2.4 1.6 1.2 0.8 2.8 3.2 t j = 150 c t j = 125 c t j = 25 c 0 100 20 40 60 80 t rr (ns) di f /dt (a/s) 1000 100 i f = 8.0 a i f = 4.0 a v r = 200 v t j = 125 c t j = 25 c i f = 16 a 1 100 10 i irrm - (a) di f /dt - (a/s) 1000 100 i f = 16 a i f = 8.0 a i f = 4.0 a v r = 200 v t j = 125 c t j = 25 c 0 100 200 300 400 500 q rr - (nc) di f /dt - (a/s) 1000 100 i f = 16 a i f = 8.0 a i f = 4.0 a v r = 200 v t j = 125 c t j = 25 c
CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 6 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 17 - typical di (rec)m /dt vs di f /dt fig. 18a - test circui t for measurement of i lm , e on , e off(diode) , t rr , q rr , i rr , t d(on) , t r , t d(off) , t f fig. 18b - test waveforms of circuit of fig. 18a, defining e off , t d(off) , t f fig. 18c - test waveforms of circuit of fig. 18a, defining e on , t d(on) , t r fig. 18d - test waveforms of circuit of fig. 18a, defining e rec , t rr , q rr , i rr fig. 18e - macro waveforms for figure 18as test circuit 100 10 000 1000 di (rec)m /dt - (a/s) di f /dt - (a/s) 1000 100 i f = 16 a i f = 8.0 a i f = 4.0 a v r = 200 v t j = 125 c t j = 25 c d.u.t. 430 f 80 % of v ce same type device as d.u.t. i c v ce t1 t2 90 % i c 10 % v ce t d (off) tf i c 5 % i c t1 + 5 s v ce i c dt t1 90 % v ge + v ge eoff = t2 v ce i c dt t1 5 % v ce i c i pk v cc 10 % i c vce t1 t2 d.u.t. voltage and current gate voltage d.u.t. + v g 10 % + v g 90 % i c tr t d (on) eon = diode reverse recovery energy tx e rec = t4 v d i c dt t3 t4 t3 diode recovery waveforms i c v pk 10 % v cc i rr 10 % i rr v cc t rr q rr = t rr i c dt tx v g gate signal device under test current d.u.t. voltage in d.u.t. current in d1 t0 t1 t2
CPV362M4FPBF www.vishay.com vishay semiconductors revision: 10-jun-15 7 document number: 94361 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 19 - clamped inductive load test circuit f ig. 20 - pulsed collector current test circuit circuit configuration 50 v 6000 f 100 v 1000 v v c * l d.u.t. r l = 480 v 4 x i c at 25 c 0 - 480 v links to related documents dimensions www.vishay.com/doc?95066 3 6 7 18 15 10 4 9 12 d1 d2 q1 q2 q3 q4 q5 q6 1 13 19 16 d3 d5 d4 d6
document number: 95066 for tec hnical questions, contact: indmodules@vishay.com www.vishay.com revision: 30-jul-07 1 ims-2 (sip) outline dimensions vishay semiconductors dimensions in millimeters (inches) notes (1) tolerance uless otherwise sp ecified 0.254 mm (0.010") (2) controlling dimension: inch (3) terminal numbers are sh own for reference only ims-2 package outline (13 pins) 7.87 (0.310) 5.46 (0.215) 1.27 (0.050) 6.10 (0.240) 3.05 0.38 (0.120 0.015) 0.51 (0.020) 0.38 (0.015) 62.43 (2.458) 53.85 (2.120) ? 3.91 (0.154) 2 x 21.97 (0.865) 3.94 (0.155) 4.06 0.51 (0.160 0.020) 5.08 (0.200) 6 x 1.27 (0.050) 13 x 2.54 (0.100) 6 x 0.76 (0.030) 13 x 1 3 4 6 7 9 10 12 13 15 16 18 19 17 14 11 258
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